1. Technical Field
The present invention relates to semiconductor integrated circuits (IC), and more particularly, to trench creation in semiconductor ICs.
2. Related Art
A conventional method for forming first and second trenches of first and second different depths, respectively, in a dielectric layer usually involves the use of two masks. The first mask is used in etching both the first and second trenches to the first depth. Next, the second mask is used in further etching only the second trench (the first trench is covered by a photoresist layer associated with the second mask) to the second depth, which is deeper than the first depth.
It is desirable to reduce the number of masks used in etching trenches of different depths. Therefore, there is a need for a novel trench patterning and etching method that requires fewer masks than the prior art.